Apple Partner TSMC Unveils Advanced 1.6nm Process for 2026 Chips
by MacRumors
MacRumors— Apple chipmaker TSMC has announced plans to produce highly advanced 1.6nm chips that could be destined for future generations of Apple silicon. TSMC yesterday unveiled a series of technologies, including the "A16" process, which is a 1.6nm node. The new technology significantly enhances chip logic density and performance, promising substantial improvements for high-performance computing (HPC) products and data centers. Historically, Apple is among the first companies to adopt new,...
TechSpot—TSMC unveils A16 manufacturing process for 1.6nm chips in challenge to Intel's claims. A16, set to enter production in the second half of 2026, will use leading nanosheet transistors and what TSMC calls an "innovative" backside power rail solution to bring "revolutionary performance" to the wafer level. While traditional chip designs involve power flowing from the top down, the backside power rail systemRead Entire Article
EEJournal—Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes. Highlights: Production-ready digital and analog design flows, powered by Synopsys.ai™ EDA suite, on TSMC N3/N3P and N2 drive successful results and accelerate analog design migration Certified Synopsys physical verification solution on TSMC N3P and N2 nodes accelerates full-chip physical signoff Collaboration on silicon photonics leveraging Synopsys 3DIC Compiler and Photonics IC solution and TSMC’s COUPE technology to further … Read More → "Synopsys Accelerates Next-Level Chip Innovation on...
GSMArena—TSMC introduces its 1.6nm process with significant performance and efficiency gains. TSMC announced its ground-breaking 1.6nm manufacturing process for chips and it also includes backside power delivery network that improves power efficiency and transistor density even further. The announced 1.6nm process relies on gate-all-around nanosheet transistors, just like the upcoming N2, N2P and N2X architectures based on the 2nm node. The new process alone allows 10% higher clock speeds at the same voltage and up to 20% lower power drain at the same frequency and complexity....